A comparator circuit with hysteresis is a comparator with two switching threshold levels; an upper switching voltage level and a lower switching voltage level wherein the upper voltage level is greater than the lower voltage level. In particular, if the previous output logic state of the comparator was a logic low, the comparator switches logic states when the input voltage exceeds the upper threshold voltage level. However, if the previous output logic state of the comparator was a logic high, the comparator switches logic states when the input voltage falls below the lower threshold voltage level. It is in this manner that hysteresis is achieved as is understood.
It is also desirable to provide a comparator with hysteresis whose switching voltage levels are independent of temperature. A typical circuit for providing a zero temperature coefficient comparator circuit with hysteresis is disclosed in a textbook entitled "Bipolar and MOS Analog Integrated Circuit Design" by Alan B. Grebene, John Wiley & Sons, 1984. In particular, FIG. 11.15 on page 559 shows a circuit for adjusting the voltage at the inverting input of the comparator by closing switch S.sub.2 to short out resistor R.sub.C in order to provide the lower switching threshold. However, this circuit includes a large number of devices, consumes a large die size area, and requires a current bias.
Hence, there exists a need for an improved zero temperature coefficient comparator circuit having hysteresis.